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My OSS friendly CPU project

Discussion in 'Linux Hardware' started by goran dakov, Aug 12, 2015.

  1. goran dakov

    goran dakov Guest

    I am currently making a Computer Processor in verilog language. It will feature Open Source firmware and have a translator to x86_64. It will be very wide, with 9 instructions executed at the same time, and with out-of-order execution. Check out the Kickstarter campaign: Just type in "heptane" at the kickstarter website.

    I'm posting this since your forum doesn't seem to have rules against it :)


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  2. goran dakov

    goran dakov Guest

    I've already began a GCC port and gnu binutils port. Basic instructions are ready in GCC, but i havent yet figured out how to delete instructions from the .md file. When I delete e.g. shld/shrd i get compilation errors.
     
  3. Goran Dakov

    Goran Dakov New Member

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    An update on my OoO 9-wide cpu: It will now be released under a bsd-like license with additional 5-th clause requiring additional permission to implement as a chip. Simulation and modification is allowed, as well as synthesis. It is not yet complete, but already has load, store, alu operations. The store to load forwarding is not yet debugged but is mostly completed. Implementation of integer simd exists but is not debugged. FPU support is in development. The emulation target for now is set to be assembly source code, that is, a subset of x86_64 asm will be supported by the gas port. Some cisc instructions are assembled as multi instruction sequences.
     
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  4. wizardfromoz

    wizardfromoz Super Moderator
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    Welcome back to linux.org, @Goran Dakov :)

    This project's scope is beyond my "paygrade", but I wish you luck with your venture.

    wizardfromoz
     
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